1. Field
Example embodiments relate to a non-volatile semiconductor memory device and methods of fabricating and operating the same. Other example embodiments relate to a non-volatile semiconductor memory device having an ion conductive layer illustrating different resistant characteristics in accordance with percolation diffusion, and methods of fabricating and operating the same.
2. Description of the Related Art
An improved semiconductor memory device may have characteristics of relatively easy recording and erasing, relatively low power consumption, a relatively high operating speed, a relatively high integration density, and an improved non-volatile property unlike some of the characteristics of a conventional semiconductor memory device (e.g., DRAM, SRAM, EEPROM, flash memory and/or any other suitable device). For example, the DRAM may have improved integration density, the SRAM may have improved operating speed, and the flash memory may have an improved non-volatile property.
With the increase in demand for an improved semiconductor memory device, a semiconductor memory device having the improved characteristics of both a conventional volatile memory device and a conventional non-volatile memory device (e.g., MRAM, PRAM, RRAM and/or FRAM) is being developed and studied.
FIG. 1 is a diagram illustrating an example of a storage node of a conventional non-volatile semiconductor memory device. Referring to FIG. 1, the storage node of the conventional non-volatile semiconductor memory device may include a copper (Cu) layer 10, a copper sulfide (CuS) layer 12, and a platinum/titanium aluminum nitride (Pt/TiAlN) layer 14 sequentially stacked. The copper layer 10, functioning as a lower electrode, may be connected to a transistor (not shown). The copper sulfide layer 12 may be used as an ion conductive layer in which resistance is varied in accordance with an ion concentration. The platinum/titanium aluminum nitride layer 14 may be used as an upper electrode. The conventional non-volatile semiconductor memory device may record bit data to the storage node and may read bit data from the storage node based on the variation in resistance of the copper sulfide layer 12. The variation in resistance of the copper sulfide layer 12 may depend on whether or not ions exist inside the copper sulfide layer 12.
FIG. 2 illustrates voltage-resistance characteristics of the storage node illustrated in FIG. 1. Graph line 11 of FIG. 2 illustrates that resistance of the storage node varies in accordance with voltage when a given concentration of ion exists in the copper sulfide layer 12. Graph line 13 illustrates variation in resistance of the storage node in accordance with voltage when ions do not exist in the copper sulfide layer 12. Comparing graph lines 11 and 13 of FIG. 2, there may be a difference between resistances of the storage node when a low voltage is applied to the storage node, but resistances of the storage node become about the same as the applied voltage is increased.
The resistance change in a conventional non-volatile memory device may occur relatively fast after the initial applied voltage. If the resistance change is relatively fast in accordance with an applied voltage, it may be difficult to provide a sufficient margin necessary for read and write operations.